Genesys Back to Haifa Departments Genesys Experience Genesys was used for the verification of more than 40 different processor designs, developed by IBM and other companies. It has been used for the verification of PowerPC designs, X86 designs, DSP designs, and embedded controller designs. In addition to the regular Genesys version, the same technology (in a tool called Genie) is being used to generate tests in the challenging multiprocessor arena. Designs Verified with Genesys Processor Type Verified Designs RISC PowerPCs (11 designs), PowerASs(10 designs), SH4, SH5, and more. DSP C54x, ST100, and more. X86 Family Four different designs. Embedded Controller PowerPCs, ARM7, STM7. VLIW ST100, ST200. The exceptional impact it made on the verification of PowerPC and PowerAS designs earned Genesys the IBM Outstanding Accomplishment award. In the area of DSP and embedded controller designs, Genesys has proved its value during the verification of several designs from different architectures, including C54x, ARM7, SH5 and SH4 (SuperH architectures), ST100 and ST200 (STmicroelecronics design), and much more. The complex X86 (CISC) architecture is a more difficult challenge for the generic Genesys platform. The architecture includes, among other things, complex instruction semantics, varying instruction sizes including optional prefixes, dozens of addressing modes, and a very complex address translation mechanism. All of these advanced features, and many others, are being handled by Genesys-X86. The generic model-based platform of Genesys has allowed Genesys-X86 to benefit from dozens of years of development experience with the Genesys-PowerPC and other Genesys designs. For example, the very complex floating point testing knowledge developed over many years for PowerPC has been effortlessly migrated to the X86 platform (exploiting the IEEE standard compatibility of both architectures).