Overview
Ever-increasing logic design complexity and pressure on development and verification resources are challenging the affordability of high-end hardware development. The aim of this project is to suggest practical new directions in logic design aiming at higher quality and increased productivity. Our proposed approach comprises two main elements:
- Use of a higher level coding style that, while still being a subset of the standard VHDL, represents the design in a more abstract way, which better reflects the design intent than the current style.
- Gradual development that includes cycles of coding, designer-level verification, and designer-level synthesis.