Soft Error Verification
IBM InsightER tool
As part of this activity, a tool called InsightER is being developed to help design teams achieve their hardware reliability requirements more easily. InsightER (Insight on Error Rates) works on a pre-silicon input (RTL), offering analysis capabilities and feedback on reliability characteristics early in the design cycle. Soft error analysis and mitigation occur at various levels of abstraction, starting from the device (transistor) level up to the application and system level. InsightER performs analysis on the logic level (VHDL/Verilog) and encompass reverse-engineering-like capabilities to extract information regarding existing (or the lack of) error detection and correction mechanisms in the hardware itself. The tool includes static analysis methods, such as structural identification of known error-detection mechanisms, as well as formal-based methods for verifying that existing error-detection and correction mechanisms are properly implemented.
InsightER is already deployed in various server design projects in IBM, and was successfully used in several System z programs and server ASIC chips. As we move forward with developing InsightER technology and methodology, more automated techniques are being developed that will facilitate the use of the tool in future projects. Our ultimate goal is to provide a reliable sign-off-quality analysis tool that can be seamlessly used on internal IBM designs as well as on external vendor chips with minimal manual effort.