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New version of RuleBase PE eases formal verification of very large chip designs

IBM Haifa Labs News Center

June 13, 2005

Step forward for the verification of large scale designs and collaboration with third-party formal verification engines

June 13, Annaheim, Calif. -- IBM today announced the release of the latest version of IBM Design Verification (DV) RuleBase PE, its industry-leading formal verification platform for the design of ASICs and microprocessors.

With a host of new functions, RuleBase now enables engineers to more rapidly verify larger and more complex chip designs, while harnessing the power of parallel computing. The improved framework allows for easy integration of third-party formal verification engines, resulting in true interoperability—a characteristic that will greatly boost the efficacy of industry players. RuleBase, pioneered out of the IBM Research Lab in Haifa, Israel, will be commercially offered through IBM Engineering & Technology Services.

RuleBase Parallel Edition (PE) is IBM's breakthrough static assertion-based verification solution for validating a design against its functional specification and verifying that the design is free from errors. The functional specifications are captured through user-defined 'assertions'. These powerful assertions are then used to verify the correctness of the design. The technology is based on parallel formal and semi-formal verification algorithms developed at the IBM Research Lab in Haifa.

IBM RuleBase technology has been a cornerstone of the formal verification field since the early 1990s, and was among the first industrial formal verification solutions made available to engineers. Over the last decade, RuleBase has been leveraged to verify ASICs and microprocessors developed by IBM and partners worldwide. In keeping with IBM's drive for open standards and interoperability, RuleBase Parallel Edition offers support for the new PSL standard property specification language.

This latest version of RuleBase PE includes new algorithms for the verification of assertions across very large designs. "We can now verify large-scale designs at a fraction of the time required by other formal verification techniques," said Dr. Yaron Wolfsthal, manager of the IBM Formal Methods group at the IBM Haifa Labs, where RuleBase Parallel Edition was conceived. "We feel the platform's versatility and interoperability are very real benefits that will empower our customers and help promote the adoption of assertion-based design flows and formal verification, using the PSL industry-wide standard."

Another new feature of RuleBase PE enables the easy integration of heterogenous formal verification engines provided by third-party suppliers. "Different problems require different kinds of solutions," continues Wolfsthal. "The new version of RuleBase offers a compelling opportunity for variability by offering customers the ability to mix and match multiple flavors of solutions."

With this new feature, RuleBase PE serves as a powerful platform giving users the flexibility to plug-and-play diverse formal verification engines, each suited to a particular task at hand, all running in parallel on top of the networked architecture of RuleBase. Users are already reporting success with this new feature, where engines from Prover Technology and TransEDA were integrated and used as add-ons to RuleBase. Customers have reported very positive feedback on the new developments, which let them to use the engine best suited for their challenges, while enabling them to continue formal verification with RuleBase and PSL-based assertions.

IBM representatives will demonstrate RuleBase PE from June 13 to 17 at DAC in Anaheim, California, Hall D,Booth 1990 and will be made commercially available through IBM's Engineering and Technology Services division.


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