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IEEE approves property language standard for verification of complex software

IBM Haifa Labs News Center

October 06, 2005

The IEEE has approved a standard to help software developers save verification time, effort and cost while improving quality. The new standard, IEEE 1850™, “Standard for PSL: Property Specification Language,” specifies the design behavior of electronic systems using properties, assertions, and other approaches. This new standard is based on IBM’s "Sugar" language, which was developed and validated at IBM Haifa Research Labs for many years before IBM donated the language for standardization.

PSL enables designers and verification engineers to clearly document interface constraints, communication protocols, and general design functionality in an executable form that can be verified in simulation and can also be used in static verification flows. In this way, the language helps increase confidence that chip and system designs are correct before fabrication. The PSL version in IEEE 1850 is unique in that it supports formal specification and verification of design intent across all major hardware description languages.

Standards are developed within the IEEE-SA Corporate Program in company-based working groups in which each member has one vote. This industry-oriented program often allows for the creation of standards in one to two years. Through a prolonged yet intensive community effort--building on the hard work of many volunteers over several years--PSL evolved to become the most widely-used property language across the electronics industry. Underlying the popularity of PSL are its true interoperability across multiple languages and design flows, its power of expressiveness, and its ease-of-use.

"We are extremely pleased to see PSL recognized as an IEEE standard," said Yaron Wolfsthal, co-chairman of the 1850 group and Senior Manager of Formal Verification and Testing Technologies at the IBM Haifa Labs. "PSL is being adopted quickly throughout the electronics industry. Establishing a standard was vital since more than half of EDA tool users already use assertions or are planning to begin using them."

PSL has attracted much attention within the design community and across academia over the last years. The PSL/Sugar Consortium ( was established to help hardware designers adopt and implement PSL-related methodologies to speed design verification. PSL is also the current focus of the European Commission's $8.7M PROSYD project on Property-Based System Design (see, the goal of which is to significantly increase the competitiveness and efficiency of the European IT industry through the establishment of a standard, integrated property-based paradigm for the design of electronic systems.

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