Custom SRAM Circuit Design Engineer
Job ID: 9AA
Location: Haifa/Tel Aviv, Israel
Description:
This position involves participating in the design of a high-performance (low-power) system on a chip/CPU with emphasis on high performance (low power) memory design. The selected candidate will work extensively with the architecture teams and logic team to define the various RAM components and take it from definition, write and debug RTL, draw schematics, perform feasibility spice simulations, create layout, and perform the necessary backend checks. The selected candidate will optimize above the CMOS schematic and layout to meet array design guideline targets and be responsible for delivering the block to work under a tight timing (and power) budget.
Requirements:
Candidates must have experience in cache/SRAM memory design, be reasonably familiar with CPU/SOC microarchitecture, and have good knowledge of custom EDA tools (Cadence schematic and layout tools). Design experience in deep submicron technologies, basic device physics, and dynamic circuits is required. Candidates must understand the memory hierarchy for a processor system and have design experience in low power methodology, scripting skills (SKILL/PERL/TCL), RTL coding experience, and experience in Digital CMOS custom design.
Education:
B.Sc. in electrical engineering. M.Sc. or PhD in electrical engineering is an advantage.
To apply for this position, send your resume to job@il.ibm.com and refer to this job title in the subject line.
