Digital Circuit Design Engineer
Job ID: 9A
Location: Haifa/Tel Aviv, Israel
Description:
This position involves participating in the design of a high-performance (low-power) system CPU. The selected candidate will work with logic design teams to define a block and take it from RTL, draw schematics using logic gates from either a standard or individually created library, and optimize above the CMOS schematic to meet macro design guideline targets. The selected candidate will also perform feasibility spice simulations; create, debug, and optimize layout; perform the necessary backend checks; and be responsible for delivering the block to work under a tight timing (and power) budget. The selected candidate may additionally be responsible for taking RTL as input and submitting it to an automated synthesis process to create a Boolean equivalent CMOS schematic.
Requirements:
Candidates must have experience in Digital CMOS custom design and processor design from a circuit level and be reasonably familiar with CPU/SOC microarchitecture. Close familiarity with custom EDA tools (Cadence schematic and layout tools) is required. Candidates must also have design experience in deep submicron technologies, basic device physics, low power methodology, and dynamic circuits. Knowledge of custom methodology development, scripting (SKILL/PERL/TCL), RTL coding, and SRAM/Cache designing is required.
Education:
B.Sc. in electrical engineering. M.Sc. or PhD in electrical engineering is an advantage.
To apply for this position, send your resume to job@il.ibm.com and refer to this job title in the subject line.
