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Hardware Formal Verification using IBM's
RuleBase Pe logo

February 23, 2010
Organized by IBM Research - Haifa


09:30 - Registration, light refreshments, networking

10:00 - Formal Verification Tutorial
In this tutorial, we will provide a swift introduction to the exciting field of formal verification. This is a good chance to learn more about this technology, which is becoming increasingly prevalent in the functional verification of hardware projects. This tutorial will explain how formal verification does not require any test vectors to be written and how it achieves 100% coverage when applied properly. We will introduce some of the technological building blocks of the technology and explain what differentiates it from simulation. Finally, we will review the latest breakthroughs of model checking technology.

11:00 - Coffee break

11:20 - Additional Applications of Formal Verification in Hardware Verification
Functional verification is only one space where formal verification can be used. In this session, we will present a number of additional areas in which formal verification technology can be used in a chip design project, including a designer debug tool, hit rare coverage goals, protocol compliance, architectural protocol verification, and more.

12:00 - IBM Experience in Formal Verification Using RuleBase PE
In this session, we will present our own experience with the technology in various projects in IBM. We will share our insights from years of experience with tools and methodologies - what works and what doesn't.

12:35 - Coffee break

12:45 - FV Methodology
In this short session, we will introduce the central issues to be considered when applying formal verification: selecting the right piece of logic, writing the appropriate rules, monitoring progress, and more.

13:15 - RuleBase PE Demo
In this demo session, we will demonstrate the use of RuleBase PE, covering the full work flow through the eyes of a verification engineer.

13:45 - Light Lunch

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