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- Apparatus And Method For Updating Pointers For Indirect And Parallel Register Access
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- A Method for Modeling Non-interlocked Diversely Bypassed Exposed Pipeline Processors for Static Scheduling
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- Digital signal processor with cascaded SIMD organization and flexible data manipulation
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- Digital signal processor with cascaded SIMD organization
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- Viterbi decoding for SIMD vector processors with indirect vector element access
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- Two's Complement Array Multiplier for Signed and Unsigned Numbers
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- Selective bypassing of a multiported register file
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- Vector register file with arbitrary vector addressing
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