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Coral
Project Overview

Leading-edge systems-on-chip (SoC) being designed today could reach 20 Million gates and 0.5 to 1 GHz operating frequency. In order to implement such systems, designers are increasingly relying on reuse of intellectual property (IP) blocks. Since IP blocks are predesigned and preverified, the designer can concentrate on the complete system without having to worry about the correctness or performance of the individual components. In practice, however, assembling an SoC using IP blocks is still an error-prone, labor-intensive and time-consuming process.

A new tool called "Coral" has been developed by IBM Research and EDA to automate the design of SoCs using cores. Coral contains new algorithms and methodologies for SoC design using cores based on the concept of a synthesizable "virtual design". Coral increases the productivity by raising the level of abstraction in which SoCs are designed.

Coral's main characteristics are:
  1. A unique encapsulation of the structural and functional information of the cores in virtual representations and properties
  2. A synthesizable virtual design representation which is a high-level abstraction of the SoC
  3. Core encapsulation and glueless interfaces which free the designer from having to create any interface logic
  4. Algorithms for mapping a virtual design into a real design with all interconnections and glue logic
  5. Special configuration menus which allow the designer to specify parameters to the SoC at the virtual design level.
Coral was the first so called "platform generator" tools to appear in the literature, at least 2 years ahead of any commercial tool. Currently, companies like Mentor and Xilinx have similar tools, and other vendors have also mentioned platform generators in their plans.

The figure below illustrates the synthesis process performed by Coral.

Coral Figure 1

Papers:
  1. R. A. Bergamaschi et. Al., "Coral - Automating the Design of Systems-on-Chip Using Cores", IEEE Custom Integrated Circuits Conference, May, 2000.
  2. R. A. Bergamaschi and William Lee, "Designing Systems-on-Chip Using Cores", embedded tutorial paper at the 37th ACM/IEEE Design Automation Conference, June 2000.
  3. R. A. Bergamaschi, S. Bhattacharya, R. Wagner, C. Fellenz, M. Muhlada, W. Lee, F. White and J-M. Daveau, "Automating the Design of Systems-on-Chip Using Cores", IEEE Design & Test Magazine, September, 2001.
Developers: Reinaldo Bergamaschi, Subhrajit Bhattacharya - IBM Watson
Ronaldo Wagner - IBM EDA
Contact: Reinaldo Bergamaschi, berga@us.ibm.com


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