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Design Automation at IBM Research

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Design Automation Design Automation
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World-class tools and capabilities for very large scale integrated circuit and system design continue to be key to producing high-performance, complex, error-free hardware products quickly. Our goal is to provide competitive advantage to these products through advanced tools and methodologies. Each of three classes of machines: high-end processors/servers, communication/media servers, and traditional clients/web stations defines a spectrum of new tool needs.

We lead IBM by focusing our efforts on emerging areas of critical importance, with increased emphasis on tools for system design. Our strategy is to develop tools driven by IBM's aggressive design goals for the next 3-5 years; high performance microprocessors designed in a single pass; ultra-large memories; single-pass ASIC designs with merged high-performance logic and memory; and optimized system designs with high performance and constrained power. These areas include tools for architectural performance analysis, for high level specification, analysis and verification, for integrated manufacturing and design, and for full chip performance/area/power closure achieved using transistor-level tools.

Our strategy is to work directly and actively on leading-edge IBM products as a methodology and tool partner, focusing on critical needs not met by EDA tool vendors. We will also form vendor partnerships where they can benefit IBM by making IBM tools industry standard and by allowing us to concentrate on critical, high leverage point tools.

Research in design automation is carried out in the Design Automation Department at the Thomas J. Watson Research Center in Yorktown Heights, New York; and in the Computer-Aided Design and Analysis group at the Austin Research Laboratory in Texas.


Projects


Buffer Optimization
Circuit Tuning
Custom Layout and Optimization
Logical and Physical Design
Manufacturability and Product Engineering
NOVA - Full Chip Power Supply Noise Analysis
Simulation
System Level Design
Transmission Line Analysis
Verification


For further information contact:

Leon Stok <stokl@watson.ibm.com>
Senior Manager, Design Automation
IBM T. J. Watson Research Center
P.O. Box 218
Yorktown Heights, NY 10598-0218