The Cell project at IBM Research

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Cell GC: Using the Cell Synergistic Processor as a Garbage Collection Coprocessor [slides]: ACM Conference on Virtual Execution Environments VEE 2008, Seattle, WA, March 2008. (C.-Y. Cher, M. Gschwind)
An Open Source Environment for Cell Broadband Engine System Software: IEEE Computer, Vol. 40, No. 6, June 2007. (M. Gschwind, D. Erb, S. Manning, M. Nutter)
The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor: International Journal of Parallel Programming, Vol. 35, No. 3, June 2007. (M. Gschwind) [Springer]
Chip Multiprocessing and the Cell Broadband Engine: Computing Frontiers 2006, May 2006.
Invited Paper and Keynote Speech (M. Gschwind). [Download Presentation]
Synergistic Processing in Cell's Multicore Architecture: IEEE Micro, Vol. 26, No. 2, March 2006. (M. Gschwind, P. Hofstee, B. Flachs, M. Hopkins, Y. Watanabe, T. Yamazaki)
A compiler enabling and exploiting the Cell broadband processor architecture: IBM Systems Journal Special Issue on Online Game Technology, Vol. 45, No. 1, January 2006. (A. E. Eichenberger, J. K. O'Brien, K. M. O'Brien, P. Wu ,T. Chen, P. H. Oden, D. A. Prener, J. C. Shepherd, B. So, Z. Sura, A. Wang, T. Zhang, P. Zhao, M. K. Gschwind, R. Archambault, Y. Gao, R. Koo)
Optimizing Compiler for the Cell Processor: PACT 2005, September 2005. (A. Eichenberger, K. O'Brien, K. O'Brien, P. Wu, T. Chen, P. Oden D. Prener, J, Shepherd, B. So, Z. Sura, A Wang, T. Zhang, P. Zhao, M. Gschwind))
A novel SIMD architecture for the Cell heterogeneous chip-multiprocessor: Hot Chips 17, August 2005. (M. Gschwind, P. Hofstee, B. Flachs, M. Hopkins, Y. Watanabe, T. Yamazaki)
Power Efficient Architecture and the Cell Processor: HPCA-11, February 2005. Invited Paper and Keynote Speech (P. Hofstee). [Download Presentation]
Exploring realtime multimedia content creation in video games: 6th Workshop on Media and Streaming Processors in conjunction with MICRO 36, December 2004. (B. Matthews, J.D. Wellman, M. Gschwind)
A Decoupled Fetch-Execute Engine with Static Branch Prediction Support: IBM Research Report RC23261, IBM TJ Watson Research Center, March 1999. (A. Bright, J. Fritts, M. Gschwind)
A 1.0-GHz single-issue 64-bit PowerPC integer processor: Journal of Solid State Circuits, Vol. 33, No. 11, Nov 1998. (J. Silberman et al.)

Cell Tutorials

Cell Architecture and Compilation Techniques: PACT 2005 Tutorial, September 2005. (K. O'Brien, A. Eichenberger, K. O'Brien, M. Gschwind, Peng Wu)
Compiling for the hetereogeneous parallelism of the Cell architecture: PAC² Tutorial, September 2005. (K. O'Brien, K. O'Brien, A. Eichenberger, M. Gschwind)
Exploiting parallelism with the Cell heterogeneous architecture: MICRO-38 Tutorial, November 2005. (M. Gschwind, K. O'Brien, K. O'Brien, A. Eichenberger)
Compiler-mediated performance of a Cell processor: CGO-4 Tutorial, March 2006. (K. O'Brien, A. Eichenberger, K. O'Brien, M. Gschwind)
Cell Broadband Engine - enabling density computing for data-rich environments: ISCA Tutorial, March 2006. (M. Gschwind, B. D'Amora, K. O'Brien, K. O'Brien, A. Eichenberger)

Cell Applications

Terrain Rendering Engine (TRE): Barry Minor, Gordon Fossum, Van To
May 2005
Online Game Prototype: Bruce D'Amora
May 2005
High-performance server systems and the next generation of online games: IBM Systems Journal Special Issue on Online Game Technology, Volume 45, Number 1, January 2006. (B. D'Amora, K. Magerlein, A. Binstock, A. Nanda, and B. Yee)
Alias Cloth Technology Demonstration for the Cell Processor: Alias Systems
May 2005
iRT: An Interactive Ray Tracer for the CELL Processor: Barry Minor. Mark Nutter Joaquin Madruga
November 2006
Folding@Home: Stanford University
Real-time Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor: IBM Research Report RC24138, 2006 (Moriyoshi Ohara, Hangu Yeo, Frank Savino, Giridharan Iyengar, Leiguang Gong, Hiroshi Inoue, Hideaki Komatsu, Vadim Sheinin, Shahrokh Daijavad, Bradley Erickson)
CellSort: High Performance Sorting on the Cell Processor: IBM Research Report RC24161 (Bugra Gedik, Rajesh R. Bordawekar, Philip S. Yu)
Cell Broadband Engine Architecture and its first implementation - A performance view [Webpage]: IBM Journal of Research and Development, Volume 51, Number 5, September 2007. (Thomas Chen, Ram Raghavan, Jason Dale, Eiji Iwata)
Porting the GROMACS Molecular Dynamics Code to the Cell Processor: PDSEC 07 (Stephen Olivier, Jan Prins, Jeff Derby, Ken Vu)
Multicore Surprises: Lessons Learned from Optimizing Sweep3D on the Cell Broadband Engine: IPDPS 07 (Fabrizio Petrini, Gordon Fossum, Juan Fernandez, Ana Lucia Varbanescu, Mike Kistler, Michael Perrone)
H.264 encoder on Cell Broadband Engine: Vadim Sheinin
The Cell B.E. achieves 12 channels of Standard Definition 30 frames per second Main Profile H.264 encoder. Further optimization is underway with the goal of achieving 16 channels. Rate-distortion characteristics of the IBM H.264 encoder are described in L.-K. Liu et al., "Video analysis and compression on the STI Cell BE processor", ICME 2006.
Accelerating FFT Performance Using the Cell BE Processor: IBM Research Report RC24244, 2007 (Jizhu Lu, Acie Nobles, Michael Perrone)
Digital Media Indexing on the Cell Processor: IBM Research Report RC24250, 2007 (Lurng-Kuo Liu, Qiang Liu, Apostol (Paul) Natsev, Kenneth A. Ross, John R. Smith, Ana Lucia Varbanescu)

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ACM - Copyright © 1990-2007 by Association for Computing Machinery, Inc. Permission to make digital or hard copies of part of all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee.