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ACEED 2005

Austin Conference on Energy-Efficient Design 2005

March 1-3, 2005
Austin, Texas


Call for Posters

Call for Posters
IBM Austin Conference on Energy-Efficient Design 2005
NEW EXTENDED DEADLINE: JANUARY 17, 2004


IBM Austin Research Laboratory's Low-Power Computing Research Center is pleased to announce the fourth annual Austin Conference on Energy-Efficient Design, ACEED 2005. This conference provides a forum to exchange ideas on low-power techniques and methodologies and to promote research on critical areas relating to energy-efficient computing.

Although the agenda has yet to be finalized, the day's events will include a poster session for which submissions are invited.

Topics of interest include:

Server and Storage Systems
- System level power analysis
- Server workload characterization beyond peak-performance benchmarks
- Packaging and cooling issues
- Low power stand-by modes and fast-on
- Adaptive power management techniques - fast response to power and cooling needs.
- Disk drives and storage systems, low-power storage

Software - OS, Hypervisor, Middleware, Applications
- Real-time, dynamic control of power
- Power-based scheduling and virtualization
- Fast-on from standby state
- Energy-efficient code optimizations
- Energy-efficiency in pervasive and wireless environments

Data Center System Management
- Resource usage based models for server power consumption
- Workload-based power management techniques
- Service level agreements addressing power concerns
- System power management across a heterogeneous IT environment
- Reports on current usage statistics

Circuit and Microarchitecture
- Energy-efficient digital and analog circuit designs
- CMOS devices and technology for low power
- Custom accelerators for improved energy efficiency
- Efficient power supply generation and conversion
- Clocking and latching for power efficiency
- Low power SRAM and I/O design
- Microarchitecture-level techniques for power management

Tools and Methodology
- System wide power analysis and simulation
- Incorporating power-/thermal- concerns in tools for logic synthesis and layout.
- Leakage modeling
- Power aware circuit tuning and physical design
- Power modeling methods - early-, mid- and implementation stage
- Power model validation and calibration methods

Poster submissions should include:
- 1 page (maximum) overview of the poster. Please use ASCII text or Adobe PDF format.
- Including a rough sketch of the poster and/or a URL related to the poster is recommended, but not required.
- Indication if the presentation is for a PUBLIC session (day 1) or INTERNAL (day 2/day3) session.

All poster submissions should be mailed to aceed@us.ibm.com and must be received by January 17, 2005.

Important Dates

  • November 22, 2004: All submissions due - Extended Public Session Posters submission deadline: JANUARY 17, 2005
  • December 17, 2004: Acceptance notifications e-mailed - Public Session Posters notification date: JANUARY 21, 2005
  • March 1, 2005: Public Session

For more information please send email to: aceed@us.ibm.com.


 

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