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ACEED 2003
Austin Conference on Energy-Efficient Design 2003
February 24-26, 2003
Austin, Texas
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Keynote
Speakers |
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Dr. Roger Schmidt, IBM Distinguished
Engineer, Chief Thermal Architect for X, I, P, and Z Series,
Chair of Cooling Council |
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Dr. Roger R. Schmidt, Distinguished
Engineer, IBM Academy of Technology Member and ASME Fellow,
has over 25 years experience in engineering and engineering
management in the thermal design of IBM’s large scale
computers. He has led development teams in cooling mainframes,
client/servers, parallel processors and test equipment
utilizing such cooling mediums as air, water, and refrigerants.
He has published more than 50 technical papers and holds
33 patents in the area of electronic cooling. He is a
member of ASME’s Heat Transfer Division and an active
member of the K-16 Electronic Cooling Committee. He has
been an Associate Editor of the Journal of Electronic
Packaging. He has taught extensively over the past 20
years Mechanical Engineering courses for prospective Professional
Engineers and has given seminars on electronic cooling
at a number of universities. |
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Kazuaki Yazawa, Chief Thermal
Engineer, Mobile Network Company, Sony Corporation, Semiconductor
Division, Sony Computer Entertainment Inc.
Kazuaki Yazawa received a Bachelor of Mechanical Engineering
degree from Chiba University, Japan, in 1980. He was a
visiting researcher at University of Minnesota from September
1999 to August 2001. Mr. Yazawa has over 21 years of mechanical
and thermal engineering experience working on various
consumer products at Sony Corporation. Currently, he is
the Chief Thermal Engineer working in research and development
of thermal packaging technology for VAIO computers. In
addition, he has been actively working on the Cell processor
as part of a Sony/Toshiba/IBM partnership since October
2001. |
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Invited
Guest Speakers |
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Michael Rosenfield, Lab Director,
IBM Austin Research Laboratory |
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Michael Rosenfield is currently Director
of the Austin Research Lab focusing on high performance
VLSI design and tools, system level power analysis, and
new system architectures. His previous position was Senior
Manager of VLSI Design and Architecture at IBM T.J. Watson
Research Center in Yorktown Heights, NY where he and his
team were involved in high performance microprocessor
VLSI design for IBM Server Group and Microelectronics,
tools, methodologies, and commonality as well as power-aware
microarchitecture, circuits/technology co-design, performance
analysis, exploratory microarchitectures, and advanced
compiler design. Previously, he has held management positions
at Research in parallel communication architecture and
in advanced lithography. In 1993, he was the technical
assistant to the Research VP of Systems, Technology, and
Science. He has a Ph.D and M.S. from the University of
California, Berkeley and a B.S. in Physics from the University
of Vermont. |
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Dr. Jan M. Rabaey, University
of California at Berkeley |
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Jan M. Rabaey received the EE
and PhD degrees in applied sciences from the Katholieke
Universiteit Leuven, Belgium, respectively in 1978 and
1983. From 1983 till 1985, he was connected to the University
of California, Berkeley as a Visiting Research Engineer.
From 1985 till 1987, he was a research manager at IMEC,
Belgium, and in 1987, he joined the faculty of the Electrical
Engineering and Computer Science department of the University
of California, Berkeley, where he is now holds the Donald
O. Pederson Distinguished Professorship. He has been a
visiting professor at the University of Pavia (Italy)
and Waseda University (Japan). He was the associate chair
of the EECS Dept. at Berkeley from 1999 till 2002, and
is currently the Scientific co-director of the Berkeley
Wireless Research Center (BWRC), as well as the director
of the GigaScale Silicon Research Center (GSRC). He is
an IEEE Fellow. His current research interests include
the conception and implementation of next-generation integrated
wireless systems. This includes the analysis and optimization
of communication algorithms and networking protocols,
the study of low energy implementation architectures and
circuits, and the supporting design automation environments. |
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Dr. Mary Jane Irwin, University
of Penn State |
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Mary Jane Irwin received the
M.S. (1975) and Ph.D. (1977) degrees in computer science
from The University of Illinois, Urbana-Champaign. Dr.
Irwin has been on the faculty at Penn State since 1977
where she is a distinguished professor of the Computer
Science and Engineering. Her research and teaching interests
are in the areas of computer architecture, VLSI systems
design, and low power systems design. Her research is
currently supported by NSF, the DARPA/MARCO Gigascale
Silicon Research Center, and the PA Pittsburgh Digital
Greenhouse. She has graduated more than twenty PhD students
since 1987. Dr. Irwin was named a Fellow of the IEEE in
1995 and a Fellow of ACM in 1996. She received an Honorary
Doctorate from Chalmers University, Sweden in 1997 and
the Penn State Engineering Society Premier Research Award
in 2001. Dr. Irwin is an active member of several professional
computing societies serving on both the ACM/SIGARCH Board
of Directors and the ACM/SIGDA Advisory Board, is an elected
member of the Computing Research Association (CRA) Board
of Directors, and is an appointed member (and current
chair) of NSF/CISE’s Advisory Committee. She is the
current Editor-in-Chief of ACM's Transaction on the Design
Automation of Electronic Systems. Dr. Irwin has also served
in leadership roles for several major conferences including
general chair of the 1996 Federated Computing Research
Conference (FCRC), general co-chair of the 1998 CRA Conference
at Snowbird (the biannual meeting of computer science
and engineering department heads and government leaders),
general chair of the 36th Design Automation Conference,
and general co-chair of the 2002 International Symposium
on Low Power Electronics and Design. |
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Dr. David Albonesi, University
of Rochester |
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Dave Albonesi is an Associate
Professor of Electrical and Computer Engineering and of
Computer Science at the University of Rochester. He worked
10 years at IBM and Prime Computer before pursuing a PhD
and an academic career. He received an NSF CAREER Award
and an IBM Faculty Partnership Award. His current research
interests are in high performance and power efficient
uniprocessor and multiprocessor architectures. |
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Technical
Session Speakers |
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Dr. Marios C. Papaefthymiou,
University of Michigan, Ann Arbor |
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Marios Papaefthymiou was born
and raised in Athens, Greece. After attending the National
Technical University of Athens for 2 years, he continued
his undergraduate studies at California Institute of Technology,
from where he received his B.S. degree in Electrical Engineering
in 1988. Marios went on to graduate school at Massachusetts
Institute of Technology, from where he obtained his S.M.
and Ph.D. degrees in Electrical Engineering and Computer
Science in 1990 and 1993, respectively. His dissertation
research investigated efficient algorithms for the timing
analysis and optimization of level-clocked circuitry.
After a 3-year term as Assistant Professor at Yale
University, Marios joined the University of Michigan,
where he is currently Associate Professor of Electrical
Engineering and Computer Science and Director of the
Advanced Computer Architecture Laboratory. His research
interests encompass a broad spectrum of issues in computer
system design with a current emphasis on low energy
design. Among other distinctions, he has received a
Best Paper Award at the 1995 ACM/IEEE Design Automation
Conference, a First Prize in the VLSI Design Contest
of the 2001 ACM/IEEE Design Automation Conference, an
ARO Young Investigator Award, Career and ITR Awards
from NSF, and a number of IBM Partnership Awards.
Marios is Associate Editor for the IEEE Transactions
on the Computer-Aided Design of Integrated Circuits,
IEEE Transactions on Computers, and IEEE Transactions
on VLSI Systems. Among other conferences and workshops,
he has served as General Chair and Technical Program
Chair for the ACM/IEEE International Workshop on Timing
Issues in the Specification and Synthesis of Digital
Systems and as Technical Program Committee Member for
the IEEE/ACM International Conference on Computer-Aided
Design. |
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