Presentations

"Validation of Turandot, a Fast Processor Model for Microarchitecture Exploration," IEEE Int'l Performance, Computing and Communication Conference, February 1999.   "An Approach for Quantifying the Impact of not Simulating Mispredicted Paths," Workshop on Performance Analysis and its Impact on Design (PAID), Barcelona, Spain, 1998.   "Trace-driven performance exploration of a PowerPC 601 OLTP workload on wide superscalar processors," First Workshop on Computer Architecture Evaluation using Commercial Workloads, January 1998.   "Exploring potential performance of wide PowerPC-based superscalar processors," Electrical Engineering Department, University of California at Irvine, October 1997.