VLSI based on III-V semiconductors?

1. Carrier heating equalizes everything. Even if the applied bias is reduced from 5 to 3 to 2.5 V or below, as we move from 0.5 to 0.25, to 0.1µm and below, several considerations (mainly based on the fact that the thermal energy, k_BT and the band-gaps do not scale) prevent reduction of the supplied bias much below 1 V, at least when sticking to the conventional wisdom of the present VLSI. A supply bias of about 1 V over a distance of 100nm or less is sufficient to heat-up the electrons beyond the Ohmic regime: Mobility and effective mass become meaningless concepts over most of the switching cycle of a transistor. What matters now is the density of states (DOS) of the semiconductor. As explained in detail elsewhere in these pages, the DOS determines the gross features of the scattering rates as well as the average velocity of the electrons (the DOS at a given energy being the reciprocal of the velocity averaged over equienergy shells). A look at Fig. 1 shows how the DOS at about 1 eV in a large variety of technologically significant semiconductors remains within a very narrow range: For both the conduction and the valence bands, the DOS at an energy of 1 eV above the band extrema is about 2×10²¹cm^-3eV^-1, the only exceptions being the conduction bands of In-based materials for which the satellite high-mass valleys are sufficiently high in energy.

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   Figure 1. Density of states for the conduction (left) and valence (right) bands for several semiconductors of technological significance. Note how the DOS at 1 eV are quantitatively very similar for both the conduction and the valence bands in all materials, with the exception of the conduction bands of In-base compounds, for which the L and X satellite valleys are sufficiently high in energy.

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   The carrier-phonon scattering rates (Fig. 2) are more widely scattered, because of differences in the coupling with phonons. Yet, even in this case, a sort of 'feedback' is in place: Larger deformation potentials usually occur in energetically wide bands. But the average velocity in wide bands is larger, thus compensating somewhat the stronger scattering.

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   Figure 2. Electron-phonon (left) and hole-phonon (right) scattering rates at 300 K for those semiconductor for which proper calibration has been made.

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   What this means is that while mobility, effective mass, and the general characteristics of the band extrema matter when one is concerned with phenomena occurring at an energy scale of k_BT (long devices, low fields, low bias), as soon as carrier transport occurs at larger energies the picture changes: All semiconductors are alike. Visually, this is shown in Fig. 3: Carriers populate the Brillouin Zone almost uniformly when driven by high fields. It is almost impossible to tell which of the two pictures refers to Si, which one to In_0.53Ga_0.47As, both at a field of about 2×10⁵ V/cm.

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   Figure 3. Simulated distributions of electrons in k-space in Si (left) and In_0.53Ga_0.47As (right) at a field of 2×10⁵ V/cm. Click on the pictures for 659×608 and 656×611 jpeg versions.

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2. Small DOS masses penalize the transconductance. The transconductance of a FET depends on the ability to control the charge density in the channel with the gate bias. Materials with low density-of-states (DOS) effective mass require a larger voltage-swing on the gate than high-DOS-mass materials, in order to change the charge density by the same amount. This contributes to depressing the transconductance of devices based on many III-V materials.
3. Small DOS masses penalize velocity overshoot. Velocity overshoot effects depend on the gradient of the (longitudinal) field along the channel. Low DOS-mass materials exhibit smaller longitudinal field-gradients than high DOS-mass materials, for reasons related to what stated in the preceding paragraph. This net drop of longitudinal drift velocity as the gate bias increases also depresses (relatively speaking) the transconductance in III-V devices at the small distances (sub 0.1µm) over which velocity overshoot matters.

A model comparison of MOSFETs based on various semiconductors

Having preannounced our expectations based on the 'universal' features of the band-structure of cubic (diamond: Ge and Si; zinc-blend: III-V's) semiconductors, it shouldn't come as a surprise that DAMOCLES predicts [1] a remarkable similar behavior for hypothetical (model) MOSFETs based on various semiconductors. In order to appreciate the merits and limitations of the results, it is important to keep in mind the assumptions employed to perform the comparative study:

• The design of the model-MOSFETs are derived from a standard design used by George Sai-Halasz and co-workers [2] for a 0.1µm Si technology. Necessary modifications (e.g., reduction of the peak doping in the source and drain deep implanted regions, too high for many donors in III-V's) were kept to the strictly required minimum, in order to obtain identical effective (electrical) channel lengths.
• The gate insulator is assumed to be an ideal SiO₂. This technological keystone is dictated by the many efforts which were being spent a decade ago in order to obtain device-quality gate insulators [3] [4] [5] on III-Vs. Whether and why this ever became reality or not depends on many issues, some of which financial and political, rather than technical.
• In the (perhaps parochial) spirit of paying attention only to logic VLSI applications, the large-signal switching is considered, by assuming applied biases (V_DD) of about 1 V for 0.1µm devices, scaled linearly with channel length. Therefore, low-bias and high-frequency devices and optical applications are neglected.
• The large-signal transconductance is assumed to be the most important figure-of-merit in determining the speed of the device. While it is true that during a full switching cycle any device will spend some time in the linear region of its I_d-V_ds (drain current vs. source/drain bias) characteristics in which low-bias effects matters, the transconductance is usually the most important parameter, since it determines the ability of the device to quickly charge a load.

The final results of the DAMOCLES simulations are shown in Fig. 4. As anticipated, all devices modeled exhibit similar performances. As the device shrink, the differences become even less noticeable. In-based compounds appear to be the exceptions, also as expected.

References

1. M. V. Fischetti and S. E. Laux, IEEE Trans. Electron Devices 38, 650 (1991).
2. G. Sai-Halasz, M. R. Wordeman, D. P. Kern, E. Ganin, S. Rishton, D. S. Zicherman, H. Schmidt, M. R. Polcari, H. Y. Ng, P. J. Restle, T. H. P. Chang, and R. H. Dennard, IEEE Electron Device Lett. EDL-8, 463 (1987).
3. A. C. Callegari, P. D. Hoh, D. A. Buchanan, and D. Lacey, Appl. Phys. Lett. 54, 332 (1989).
4. J. Batey and E. Tierney, J. Appl. Phys. 60, 3136 (1986).
5. G. C. Fountain, S. V. Hattangady, D. J. Vitavage, R. A. Rudder, and R. J. Markunas, Electron. Lett. 24, 1134 (1988).

	damoclesNO-SPAM@watson.ibm.com (last updated: January 16, 1999)